Unleash next-level data processing with AMD's Alveo™ V80 compute accelerator, now shipping in volume. Engineered for memory-bound applications, it doubles bandwidth and compute density. Perfect for HPC, network security, and computational storage, the Alveo V80 streamlines development and optimizes performance across diverse workloads.

Two AMD-sponsored FIRST robotics teams are not only building competitive robots, but also helping to promote STEM education in their communities. 

As embedded AI, video, and control applications explode, there is a growing need for heterogeneous processing to accelerate end-to-end compute within tight area and power constraints. Multi-chip processing solutions come with significant power, area, and complexity overhead; instead, designers need support for flexible, real-time preprocessing, efficient AI inference, and high-performance postprocessing on a single device.

Check out the latest innovations that AMD is presenting at OFC 2024 

Hardware designers building embedded applications have long made difficult tradeoffs, balancing cost, I/O count, and logic density requirements with the need to achieve fast time-to-market. We’re excited to announce a solution that renders those tradeoffs obsolete: the new AMD Spartan™ UltraScale+™ FPGA low-cost family, which offers high I/O-to-logic-cell ratios, low power, and state-of-the-art security features in a small form factor.

Today, Wormhole, a leading blockchain interoperability platform, is collaborating with AMD to make FPGA hardware accelerators available to the Wormhole ecosystem. By increasing the accessibility of accelerators to blockchain developers, this collaboration aims to make a meaningful difference in accelerating trust and value transfer in permissionless environments. AMD will also lend its deep expertise in hardware acceleration to help deliver speed and scalability to multichain applications being built with Wormhole.

AMD FPGAs and Adaptive SoCs are the first in the industry to conform to the new DisplayPort™ 2.1 Audio/Video Standard for 8K Ultra-HD Video

The Pro AV, Broadcast, and Residential markets are rapidly adopting advancements in immersive, adaptive, and intelligent AV technology. This creates a growing need for enhanced bandwidth, low-latency video processing, and compression capabilities, with the ability to differentiate through audio and video quality improvements and features.

As designs get more complex, AMD is continuing to innovate—ensuring that system architects and developers have the tools they need to efficiently develop mixed-domain designs that include both the processing subsystem and the FPGA fabric.
Today, I am pleased to announce the Vitis™ unified software platform 2023.2 release, offering a singular environment to facilitate the streamlined design, simulation, and implementation of high-performance designs using AMD adaptive SoCs and FPGAs.
Our latest release unleashes new functionality, such as a standalone tool for embedded C/C++ design, a new unified GUI, and a host of enhancements to simplify the use of AMD Versal™ adaptive SoCs with AI Engines (AIEs).

Bringing new adaptive SoC and FPGA designs to market quickly in an increasingly complex and competitive environment requires hardware designers and system architects to explore new ways of working more efficiently. The AMD Vivado™ Design Suite provides an easy-to-use development environment with powerful tools to accelerate the implementation of large adaptive SoCs and FPGAs.
Today, I’m excited to share details about the 2023.2 release of Vivado Design Suite, which offers even more advantages to designers looking to reach target Fmax fast, accurately estimate power requirements before implementation, and easily meet design specifications.