%PDF-1.6
%
7861 0 obj
<>
endobj
8023 0 obj
<>stream
application/pdf
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core providing high-bandwidth direct memory access between memory and AXI4-Stream-video type target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
pg020,Genlock,vdma,Data Re-Alignment Engine, DRE, AXI4, AXI4-Lite,AXI4-Stream,Virtex-7,Virtex7,Virtex 7,V-7,V7,V 7,Kintex-7,Kintex7,Kintex 7,K-7,K7,K 7,Virtex-6, Virtex 6, V-6, V6, V 6,Spartan-6,Spartan-6,S-6,S6,S 6, Artix-7,Artix7,Artix 7,A-7,A7,A 7,Zynq-7000,Zynq,genlock,HBlank,VBlank,Vsync,Hsync,Vivado,Vivado IP Catalog,Vivado Design Suite,020
The AXI Video Direct Memory Access (AXI VDMA) core is a soft Xilinx IP core providing high-bandwidth direct memory access between memory and AXI4-Stream-video type target peripherals. Initialization, status, and management registers are accessed through an AXI4-Lite slave interface.
2013-03-10T17:35:29.134-07:00
Xilinx, Inc.
Xilinx PG020 LogiCORE IP AXI Video Direct Memory Access (axi_vdma) v5.04a Product Guide
2012-12-11T23:00:05-08:00
2012-12-11T04:49:53-08:00
2012-12-11T23:00:05-08:00
FrameMaker 10.0
/content/dam/xilinx/support/documentation/ip_documentation/axi_vdma/v5_04_a/pg020_axi_vdma.pdf/_jcr_content/renditions/original
products:ip-core/axi-video-dma
products:ip-core/video-and-image-processing-pack
applications:ip-functions/interconnect-infrastructure/axi4-stream
products:device/fpga/virtex-7
products:device/fpga/virtex-6
applications:ip-functions/interconnect-infrastructure/axi4
products:device/fpga/kintex-7
products:device/fpga/artix-7
applications:topic/embedded-processing/memory-interface
products:device/fpga/spartan-6
support:product-type/ip-documentation
products:device/soc/zynq-7000
products:ip-core/video-processing-pack
products:design-tool/vivado-design-suite
support:document-class/document-type/product-guide
ec930706c429265a24f496952518a5985274733f
2013-03-05T22:29:59.44-08:00
Acrobat Distiller 10.0.0 (Windows)
Xilinx, Inc.
"pg020,Genlock,vdma,Data Re-Alignment Engine, DRE, AXI4, AXI4-Lite,AXI4-Stream,Virtex-7,Virtex7,Virtex 7,V-7,V7,V 7,Kintex-7,Kintex7,Kintex 7,K-7,K7,K 7,Virtex-6, Virtex 6, V-6, V6, V 6,Spartan-6,Spartan-6,S-6,S6,S 6, Artix-7,Artix7,Artix 7,A-7,A7,A 7,Zynq-7000,Zynq,genlock,HBlank,VBlank,Vsync,Hsync,Vivado,Vivado IP Catalog,Vivado Design Suite,020"
Acrobat Distiller 10.0.0 (Windows)
uuid:d0835b40-9461-4c06-aa34-b140e940cfba
uuid:47f1ab54-0a83-41a0-8cc1-d515768aa2e5
endstream
endobj
7862 0 obj
<>
endobj
7877 0 obj
<>
endobj
7834 0 obj
<>
endobj
7836 0 obj
<>
endobj
7837 0 obj
<>
endobj
7848 0 obj
<>
endobj
7849 0 obj
<>
endobj
7850 0 obj
<>
endobj
7851 0 obj
<>
endobj
7852 0 obj
<>
endobj
7853 0 obj
<>
endobj
7854 0 obj
<>
endobj
1323 0 obj
<>
endobj
1329 0 obj
<>
endobj
1334 0 obj
<>stream
h[rHrϧ6
@u8"9EIKffP 1}kt~Y@fVa"( WUښQGei
WD.7M85QVUe6QR4>tɣ*qqf2x==z5ƚ푍41'Q(&RVexYݵ_ ,"3͎9&RE`t(ɜ"Xp~(*~$)ɏcD6<L6eLߟ]Q%QQ_\;F8Y),h;̺t#?aGY=]-i7xfM*L#,̣hb,3E!cߣ8*R.\Z,ҤFtR9O#\tٗ[zI:
dY3k7FeYxK7эsWZp@K%?1F\Ӗ6-L^D-s/0Y'elQf_#&B^R&&!KAb'ykW˺{]oz<سlÉNlol$ʃ=Ðp|v95pREE\A6UE9;~gDAQ%g3 FqyDSl5/μ<%wi^_,%P,jRjz>4nin̆zu-lK*+6'x G.