////////////////////////////////////////////////////////////////////////////////
//   ____  ____
//  /   /\/   /
// /___/  \  /
// \   \   \/     Vendor : Xilinx
//  \   \         Version : 1.1
//  /   /         Application : GTH Transceiver 
// /___/   /\     Filename : GTHFix.v
// \   \  /  \
//  \___\/\___\
//
//
//
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wire refclk;
wire cpllpd;
wire cpllrst;
wire refclkb;
IBUFDS_GTE2 refclk_ibuf (.O(refclkb), .ODIV2(), .I(REFCLK_P), .CEB(1'b0), .IB(REFCLK_N));

BUFG gInst(
   .I(refclkb),
   .O(refclk)));

module gt_cpllpd_ovrd (
  input i_ibufds_gte2,
  output o_cpllpd_ovrd,
  output o_cpllreset_ovrd
  );
(* equivalent_register_removal="no" *)  reg [95:0] cpllpd_wait = 96'hFFFFFFFFFFFFFFFFFFFFFFFF;
(* equivalent_register_removal="no" *)  reg [127:0] cpllreset_wait = 128'h000000000000000000000000000000FF;
  always @(posedge i_ibufds_gte2)
  begin
     cpllpd_wait <= {cpllpd_wait[94:0], 1'b0};
     cpllreset_wait <= {cpllreset_wait[126:0], 1'b0};
  end
  assign o_cpllpd_ovrd = cpllpd_wait[95];
  assign o_cpllreset_ovrd = cpllreset_wait[127];  
endmodule
.
.
.
gt_cpllpd_ovrd cpllPDInst (
   .i_ibufds_gte2(refclk),
   .o_cpllpd_ovrd(cpllpd),
   .o_cpllreset_ovrd(cpllrst));

.
.
. 
GTHE2_CHANNEL chanInst(

   .CPLLPD(cpllpd | orig_cpllpd),            // orig_cpllpd is the original power down
   .CPLLRESET(cpllrst | orig_cpllrst),       // orig_cpllrst is the original reset
...
   );